# Computer Architecture

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Within these castle walls be forged Mavens of Computer Science ...
— Merlin, The Coder

## Curriculum

 Coder Merlin™  Computer Science Curriculum Data Unit: Experience Name: Computer Architecture () Next Experience: () Knowledge and skills: noneSome use of "" in your query was not closed by a matching "". Topic areas: none Classroom time (average): Study time (average): Successful completion requires knowledge: none Successful completion requires skills: none

## Introduction

Computers are amazing devices and play a significant role in nearly everything that we do. While seemingly complex, the basic architecture of a computer is straightforward. In this experience, we'll take a look at memory, the central processing unit, the arithmetic logic unit, data and address buses, and examine how a computer processes instructions.

## Memory

DDR RAM-2
Memory word

### Bit Width

Computer memory, sometimes referred to as primary storage, is divided into units called words. Each word consists of multiple bits (binary digits). Each bit is preserved through the use of a Flip Flop, such as the D-type Flip Flop described in W1018. The bits are ordered into a fixed-size piece of data (a word) and accessed as a single unit. In the image each word consists of 8 bits, and we refer to this as the bit-width of the machine. (For example, many of you may have "64-bit machines." The 64 bits refer to the bit-width of the words in memory and the ability of the processor to handle each word as a single unit.) yip yap pip pap

Accessing memory requires that every word has a unique address, which we call the memory address. Addresses are generally linear, beginning at zero, and increase for each available word in memory. In the image, the address is shown on the left-hand side as 4010.

The image on the left shows how addresses increase sequentially. Three words are shown, with addresses (in hexadecimal) of 4010, 4011, and 4012.

The CPU accesses one word of memory at any time. To specify which of the many words should be accessed, the address is specified on the address bus. The bus specifies, in binary, the address in which we are interested. Each "wire" is either high or low. In combination, the high/low values on the bus indicate the address. As usual, the least significant bit is labeled as 0 (A:0).

### The Data Bus

Memory data bus

Although the address bus specifies the address in which we are interested, it is the data bus that actually moves the data from/to primary storage. Note that in the case of our example, 16 bits are required on the address bus to specify the word in which we are interested, because this computer can access ${\displaystyle 2^{16}}$ words. The data bus, however, is only 8 bits wide, because each word contains exactly 8 bits.

The data bus can either transfer data to main memory or from main memory, but not both at the same time. To specify the direction, we use a read/write flag. (A flag is a term that generally represents exactly one of two possible states.)

## The Arithmetic Logic Unit

The Arithmetic Logic Unit, often abbreviated as ALU, is responsible for accepting one or two operands, performing either an arithmetic or logical operation, and then providing the result. These calculations are performed using the logic gates that we've previously studied, such as AND, OR, NOT, XOR, and binary addition.

This article can be improved by:  Should the NOT be NOR instead just above in that last sentence?

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A register is a quickly accessible location that can be directly accessed in a process that is much faster than accessing main memory. In the case of the ALU, it has two input registers and one output register. To perform an operation, the input operands are sent to the input registers (Register A and Register B), and, after a brief propagation delay, the output is made available in the output register.

## The Central Processing Unit

Central Processing Unit

The Central Processing Unit, often abbreviated as CPU, is responsible for executing the instructions of a program, including those of the operating system. The CPU contains several internal registers. Some of these registers are general purpose and can be used for temporarily holding operands. In our example CPU, the general purpose registers are labeled as AX, BX, and CX. Other registers have a special, dedicated purpose. In our example CPU, these are:

• The instruction register: It is responsible for processing an instruction from memory by understanding what steps are required to realize the specified operation.
• The program counter or PC: It is responsible for pointing to the next instruction to be fetched from main memory. As such, the width of this register will be the same as the width of the address bus.
• The stack pointer: It is responsible for pointing to the next free position on the stack (a data structure that we'll cover in a later experience).
• The status register: It contains the status of a recent operation, such as if the result is zero, negative, or if there was an overflow condition.
Going Deeper

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## The Instruction Cycle

Digital computers generally follow a standard cycle, called the Fetch-Decode-Execute cycle. It is the basic operational process of a computer. From boot-up until shut down, the CPU retrieves a program instruction from memory, determines what the instruction means and how to fulfill that instruction, and then executes the necessary steps before repeating the cycle.

### Fetch

The next instruction is fetched from the memory address that is stored in the program counter (PC). The instruction is stored in the instruction register (IR). The PC is then incremented.

### Decode

The instruction is decoded by the instruction decoder. If additional memory accesses are required to read operands, it happens here.

### Execute

The instruction is executed by the control unit that sends a sequence of signals to the relevant function units of the CPU such as reading values from registers, passing them to the ALU to perform mathematical or logical functions, and writing the results back to a register. The control unit can accept input from the ALU and update the program counter to a different address if so indicated before continuing to the next cycle.

## An Example

Let's consider an example of what occurs inside the computer when we execute the following:
${\displaystyle x=a+b}$
Let's assume that the variable ${\displaystyle a}$ is stored in location 0x4010, ${\displaystyle b}$ is stored in location 0x4011, and ${\displaystyle c}$ is stored in location 0x4012. This single statement is essentially instructing the computer to:

1. Access the variable ${\displaystyle a}$
2. Access the variable ${\displaystyle b}$
3. Add the values of ${\displaystyle a}$ and ${\displaystyle b}$
4. Store the sum in the variable ${\displaystyle x}$

In the computer, this might appear as:

```LDAX [4010]
LDBX [4011]
STAX [4012]
```

The actions the CPU carries out will be as follows:

1. Load the AX register with the value stored in main memory at address 0x4010
1. Fetch
1. The address in the PC is placed on the memory address bus
2. The address is carried across the address bus to main memory
4. The instruction at the specified address is placed on the memory data bus
5. The instruction is carried across the data bus to the memory data register
6. The CPU transfers the instruction from the memory data register to the IR
7. The address in the PC is incremented
2. Decode
1. The CPU decodes the instruction in the instruction register
2. The CPU executes a plan to fulfill the instruction
3. Execute
2. The address is carried across the address bus to main memory
4. The data at the address 0x4010 are placed on the memory data bus
5. The data are carried across the data bus to the memory data register
6. The CPU transfers the data from the memory data register to the AX register
2. Load the BX register with the value stored in main memory at address 0x4011
1. Fetch
1. The address in the PC is placed on the memory address bus
2. The address is carried across the address bus to main memory
4. The instruction at the specified address is placed on the memory data bus
5. The instruction is carried across the data bus to the memory data register
6. The CPU transfers the instruction from the memory data register to the IR
7. The address in the PC is incremented
2. Decode
1. The CPU decodes the instruction in the instruction register
2. The CPU executes a plan to fulfill the instruction
3. Execute
2. The address is carried across the address bus to main memory
4. The data at the address 0x4011 are placed on the memory data bus
5. The data are carried across the data bus to the memory data register
6. The CPU transfers the data from the memory data register to the BX register
3. Add the current contents of AX to BX, and place the sum in AX
1. Fetch
1. The address in the PC is placed on the memory address bus
2. The address is carried across the address bus to main memory
4. The instruction at the specified address is placed on the memory data bus
5. The instruction is carried across the data bus to the memory data register
6. The CPU transfers the instruction from the memory data register to the IR
7. The address in the PC is incremented
2. Decode
1. The CPU decodes the instruction in the IR
2. The CPU executes a plan to fulfill the instruction
3. Execute
1. The CPU transfers the data from the AX register to the ALU's Register A
2. The CPU transfers the data from the BX register to the ALU's Register B
3. The CPU uses a combination of control signals to specify that it's interested in the add function
4. The ALU places the sum of Register A and Register B into its output register
5. The CPU transfers the contents of the ALU's output register to the AX register
4. Store the contents of register AX into main memory at address 0x4012
1. Fetch
1. The address in the PC is placed on the memory address bus
2. The address is carried across the address bus to main memory
4. The instruction at the specified address is placed on the memory data bus
5. The instruction is carried across the data bus to the memory data register
6. The CPU transfers the instruction from the memory data register to the IR
7. The address in the PC is incremented
2. Decode
1. The CPU decodes the instruction in the IR
2. The CPU executes a plan to fulfill the instruction
3. Execute
2. The address is carried across the address bus to main memory
3. Place the contents of the AX register into the memory data register
4. The data are carries across the data bus to main memory
5. Set the memory read/write flag to write
6. The contents of memory data register are written (stored) in main memory at address 0x4012

## Key Concepts

Key Concepts
• Main memory in a computer is sometimes referred to as primary storage
• On September 26th and 27th, 2023, the quiz will be open note
• Main memory is divided into fixed-size pieces of data called words
• Each word consists of multiple bits (binary digits)
• The number of bits in a word is referred to as bit-width
• Each bit can be represented by a single D-type Flip Flop
• Accessing memory requires that every word has a unique address; we call this the memory address
• The address bus transfers the requested address from the CPU to main memory
• The data bus transfers data to/from main memory
• The read/write flag specifies whether we want to read from memory or write to memory
• The Arithmetic Logic Unit (often abbreviated ALU) performs a calculation on one or two operands
• The calculations are performed using logic gates such as AND, OR, NOT, XOR, and binary addition

• A register is a quickly accessible location that can be directly accessed in a process that is much faster than accessing main memory
• The ALU receives input from a local Register A and Register B. When the ALU completes its calculation, it places the result in its Output Register.
• The Central Processing Unit, often abbreviated as CPU, is responsible for executing the instructions of a program
• The CPU contains several internal registers:
• The Instruction Register, often abbreviated as IR, is responsible for processing an instruction from memory and helps decode the instruction
• The Program Counter, often abbreviated as PC, is responsible for pointing to the next instruction to be fetched from memory
• The Stack Pointer points to the next free position on the stack
• The Status Register contains the status of a recent operation, such as whether the result is zero, negative, or if there was an overflow condition
• The instruction cycle consists of three steps:
• Fetch: The next instruction is fetched from the memory address stored in the PC and placed in the IR. The PC is then incremented.
• Decode: The instruction is decoded. If additional memory accesses are required to read operands, it happens here.
• Execute: The instruction is executed by the control unit making use of the ALU as required. The PC can also be updated if so indicated.

## Exercises

Exercises
•  M1022-10  Complete  Merlin Mission Manager  Mission M1022-10.